Design Verification Principal Engineer at HackerTrail

More details will be shared during screening.

Job Description:

We are looking for a highly motivated Design Verification Lead to drive the verification strategy and execution for complex IC (NPU) designs. In this role, you will lead a team of verification engineers to ensure robust functional coverage and high-quality silicon through advanced verification methodologies, automation, and close collaboration with design and architecture teams.

Key Responsibilities:

Lead the verification strategy and execution for assigned Design Under Test (DUT) blocks, ensuring comprehensive functional coverage and high verification quality.
Guide and mentor the verification team in developing, reviewing, and maintaining detailed verification test plans aligned with design specifications and architecture requirements.
Develop and implement verification environments, testbenches, and test sequences based on modern verification methodologies.
Drive the creation of test patterns and stimulus scenarios to thoroughly validate DUT functionality and corner cases.
Run simulations, analyze results, and debug RTL issues in close collaboration with design engineers.
Manage and execute regression testing to ensure design stability across feature updates and bug fixes.
Track, analyze, and improve functional and code coverage metrics, enabling coverage-driven verification and sign-off readiness.
Ensure clear and comprehensive verification documentation, including test cases, results, coverage reports, and verification sign-off.
Develop and enhance automation scripts, reusable verification components, and Verification IP (VIP) to improve team productivity and scalability.
Work cross-functionally with design, architecture, and physical implementation teams to resolve issues and achieve timely project milestones.
Mentor and provide guidance to help in developing more junior team member

Job Requirements:

How you will stand out:

At least 10 years of relevant experience in IC/SoC functional verification.
Strong debugging skills with RTL simulation and waveform analysis tools.
Proficient in UVM, SystemVerilog, Verilog, and SVA languages
Strong knowledge in protocols such as NPU, AXI, NoC, RISC-V;
Proven ability to lead verification efforts and mentor engineers.
Excellent team player with strong communication skills.
Excellent communication and collaboration skills in cross-functional development environments
Bachelor’s degree or above in Microelectronics, Semiconductor Engineering, Electronic & Electrical Engineering, or related fields.

Benefits:

A culture that values authenticity and diversity of thoughts and backgrounds;

An inclusive and respectable environment with open workspaces and exciting start-up spirit;

Fast-growing company with the chance to network with industrial pioneers and enthusiasts;

Ability to contribute directly and make an impact on the future of the digital asset industry;

Involvement in new projects, developing processes/systems;

Personal accountability, autonomy, fast growth, and learning opportunities;

Attractive welfare benefits and developmental opportunities such as training and mentoring.

Required Skills:

SOCUVMSystemVerilogVerilogTeam LeadershipWaveformDebugging

Optional Skills:

RISC-VRegression testingMentorshipCollaboration

Posted by:

Ryan

rt@hackertrail.com